Digital I/O Boards

   General Standards Corporation is a leading supplier of high speed digital/parallel I/O boards for embedded applications on several form factors/busses, cable transceiver options, and for many operating systems.

     Cable transceiver options are RS-422, RS-485, LVDS, PECL, and TTL.


Features Include:



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AND
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  • Cable Transfer speeds up to 400 mb/per second

  • Large FPGA provides for flexable cable interface

Form Factors:


  • CCVPX
  • PCI-Express
  • PXI
  • PMC
  • PC/104-Plus
  • PCI
  • cPCI
  • CCPMC
  • PC/104-Express
  • PCI-X
  • cPCI-X
  • XMC
  • Ask About Other Form Factors

  • Software Drivers:

  • Windows
  • VxWorks
  • QNX
  • Linux
  • MathWorks
  • Solaris
  • Labview
  • xPC Target
  • Ask About Other Drivers

  • Free Device Drivers for Many OSes

    Free Loaner Board Offers

    Digital I/O Selection Tables:


    Available Form Factor Model Series & Transceiver Type Applications Data Width Control Lines Max Cable Speed Max Bus Speed Key Features

    PCI64
    PMC64*
    cPCI64
    PC104+
    PCIe464

    HPDI32ALT
    (LVDS or TTL)

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    6 General Purpose I/O lines

    50MHz/200Mbytes per second

    400 Mbytes per second

    Deep FIFO buffering (up to 1M byte), 64-bit PCI interface

    PMC

    HPDI32B

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    7 bi-directional programmable handshake lines

    66MHz/400Mbytes per sec

    200 Mbytes per second

    Deep FIFO buffering (up to 1M byte),32-bit PCI interface

    PMC*
    PCI
    cPCI
    PC104+
    PCIe

    HPDI32B-COS

    Change-of-state Monitor
    Logic Analyzer Operation

    32

    Unused signals can be set as GPIO

    Up to 20MHz Sample Rate

    100 Mbytes per second

    Selectable Change-Of-State or Logic Analyzer Operation
    Bitwise Programmable Mask for COS Detection and Logic Analyzer Trigger
    20 MHz Base Sample rate with Programmable Clock Divider.

    PCIe*

    DIO32A-S

    Data Acquisition and Control
    General Purpose Parallel interface
    Development and Research

    32

    N/A

    PIO

    N/A

    32 general purpose IO signals for RS422/RS485 applications.

    PCIe4

    HPDI32CL
    (LVDS)

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    Clock, Valid, Ready and 5 General Purpose I/O lines

    500 MBytes/sec

    Up to ~800 MBytes per second

    Large 512 MByte (128M x 32) Transmit/Receive Memory Buffers, 4 lane PCIe support, Bidirectional LVDS Transceivers provide for Multipoint Applications

    PCI*
    PMC*
    cPCI
    PC104+
    PCIe

    DIO24

    High Speed Data Acquisition and Control
    General Purpose Parallel interface
    Development and Research

    24

    1 General Purpose Input

    PIO

    N/A

    General Purpose parallel I/O;
    Flexible cable interface



    Opto-Isolated Digital I/O Selection Tables:


    Available Form Factor Model Series & Transceiver Type Applications Data Width Control Lines Max Cable Speed Max Bus Speed Key Features

    PMC
    PCI
    cPCI
    PC104+

    OPTO32D

    Data Acquisition and Control
    General Purpose Parallel interface
    Development and Research

    24 in
    8 out

    NA

    PIO

    N/A

    Optically isolated I/O change-of-state interrupts

    PCIe

    OPTO32C

    Data Acquisition and Control
    General Purpose Parallel interface
    Development and Research

    24 in
    8 out

    NA

    PIO

    N/A

    Optically isolated I/O change-of-state interrupts
    Selectable input voltage range through use of field replaceable bias resistors.

    PCIe

    OPTO16X16

    Data Acquisition and Control
    General Purpose Parallel interface
    Development and Research

    16 in
    16 out

    NA

    PIO

    N/A

    Optically isolated I/O change-of-state interrupts
    Selectable input voltage range through use of field replaceable bias resistors.



    Isolated Digital I/O In Development:


    Available Form Factor Model Series & Transceiver Type Applications Data Width Control Lines Max Cable Speed Max Bus Speed Key Features

    cPCI6U64

    HVDI32MI-A

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32 galvanically isolated digital inputs

    ------

    ------

    533 Mbytes per second

    32 Galvanically-Isolated Digital Input Channels with Built-in Selftest (BIST) and dual thresholds

    cPCI6U64

    HVDO16MI

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    16 Mutually Isolated Digital Ouputs

    ------

    ------

    533 Mbytes per second

    16-Channel, Isolated Digital Output Module With 16 Mutually Isolated High-Voltage High-Current Drivers

    cPCI6U64

    HVDOTP16MI

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    16 Mutually Isolated Totem-Pole (current source/sink) digital output channels

    ------

    ------

    533 Mbytes per second

    16-Channel, Isolated Digital Output Module With 16 Mutually Isolated High-Voltage High-Current Source-Sink Totem-Pole Drivers



    Digital I/O Legacy Products:


    Available Form Factor Model Series & Transceiver Type Applications Data Width Control Lines Max Cable Speed Max Bus Speed Key Features

    PMC
    PCI
    cPCI
    PC104+
    PCIe

    HPDI32A
    (RS-422/485 or PECL)

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    6 General Purpose I/O lines

    25MHz/100Mbytes per second
    (50MHz/200MBPS PECL)

    100 Mbytes per second

    Deep FIFO buffering (up to 1M byte),32-bit PCI interface

    PCI

    DMI32

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    14 General Purpose I/O lines

    50MHz/200Mbytes per second

    100 Mbytes per second

    Very high-speed parallel digital input/output; Up to 4G byte of SDRAM

    PCI64

    HPDI32AL
    (RS-422/485 or LVDS)

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    6 General Purpose I/O lines

    25MHz/100Mbytes per second

    400 Mbytes per second

    Deep FIFO buffering (up to 1M byte), 64-bit PCI interface

    PCI64

    HPDI32AL
    (PECL)
    Call for availability

    High Speed Data Acquisitionand Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    6 General Purpose I/O lines

    50MHz/200Mbytes per second

    400 Mbytes per second

    Deep FIFO buffering (up to 1M byte), 64-bit PCI interface

    PMC
    PCI
    cPCI
    PC104+
    PCIe

    HPDI32A-COS

    Change-of-state monitor
    General Purpose Parallel DMA interface
    Development and Research

    32

    6 General Purpose I/O lines

    25MHz/100Mbytes per second

    100 Mbytes per second

    Selectable sample rate, change-of-state detection

    PCI

    OPTO32B

    Data Acquisition and Control
    General Purpose Parallel interface
    Development and Research

    24 in
    8 out

    NA

    PIO

    N/A

    Optically isolated I/O change-of-state interrupts
    12V Contact Operation,
    Power is provided for the Outputs from the PCI Bus +12V Power.
    Optional Higher current resistors on channels 0-7.
    Jumpers for Grounding connector pins in the CONTACT configuration.

    PMC64C
    PCI64C
    cPCI64C
    PC104+
    PCIe

    HPDI40C2L
    LVDS

    High Speed Data Acquisition and Control
    General Purpose Parallel DMA interface
    Development and Research

    32

    5 General Purpose I/O lines

    100MHz/400Mbytes per second

    533 Mbytes per second

    4Mbyte FIFO buffering; in Transmit or Receive

    PMC
    PCI
    cPCI
    PC104+

    OPTO32A

    Data Acquisition and Control
    General Purpose Parallel interface
    Development and Research

    24 in
    8 out

    NA

    PIO

    N/A

    Optically isolated I/O change-of-state interrupts



    Read more about Digital IO technology.




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